This book discusses the evolution of multigate transistors, the design challenges of transistors for high-frequency applications, and the design and modeling of multigate transistors for high-frequency applications. The contents particularly focus on the cut-off frequency and maximum oscillation frequency of different multigate structures. RF stability modeling for multigate transistors is presented, which can help to understand the relation between the small-signal parameter and the physical parameter of the device for optimization. This is a useful reference to those in academia and industry.

K. Sivasankaran is an Associate Professor in the Department of Micro and Nanoelectronics, School of Electronics Engineering at VIT University, India. He pursued his Ph.D. at VIT University, Vellore. He has over 15 years of academic experience and taught courses like ASIC design, FPGA-based system design, physics and modeling of semiconductor devices, IC technology, semiconductor device physics, analog circuit design, and VLSI system design. His interest areas are device modeling and simulation, ASIC design, and FPGA-based system design. Dr. Sivasankaran has got several publications in reputed journals and conferences to his credit. Partha Sharathi Mallick pursued his Ph.D. at Jadavpur University, India, for which he received the prestigious Jawaharlal Nehru Fellowship. He is currently working as a Professor of electronics engineering at VIT University, India. Dr. Mallick has led various research teams and developed 'Online Lab in Microelectronics', 'Monte Carlo Simulator of Compound Semiconductors', 'Nanostructured MIM Capacitor', and 'Low-cost Electric Fencers' and has published 104 research papers in different journals and conferences of international repute. He has guided 13 Ph.D. scholars to date. He is an Enlisted Technical Innovator of DSIR, Government of India, 2007. Dr. Mallick and his team established NxP Semiconductor Lab, Q-Max Technology Lab, Schneider Electric Lab, and Danfoss Center of Excellence at VIT University. He is presently finding new materials and technology for future nanoscale electronics and VLSI circuit engineering. He has been leading the Ranking and Accreditation team of Vellore Institute of Technology (VIT) as Director since 2015.

Auteur

K. Sivasankaran is an Associate Professor in the Department of Micro and Nanoelectronics, School of Electronics Engineering at VIT University, India. He pursued his Ph.D. at VIT University, Vellore. He has over 15 years of academic experience and taught courses like ASIC design, FPGA-based system design, physics and modeling of semiconductor devices, IC technology, semiconductor device physics, analog circuit design, and VLSI system design. His interest areas are device modeling and simulation, ASIC design, and FPGA-based system design. Dr. Sivasankaran has got several publications in reputed journals and conferences to his credit. Partha Sharathi Mallick pursued his Ph.D. at Jadavpur University, India, for which he received the prestigious Jawaharlal Nehru Fellowship. He is currently working as a Professor of electronics engineering at VIT University, India. Dr. Mallick has led various research teams and developed "Online Lab in Microelectronics", "Monte Carlo Simulator of Compound Semiconductors", "Nanostructured MIM Capacitor", and "Low-cost Electric Fencers" and has published 104 research papers in different journals and conferences of international repute. He has guided 13 Ph.D. scholars to date. He is an Enlisted Technical Innovator of DSIR, Government of India, 2007. Dr. Mallick and his team established NxP Semiconductor Lab, Q-Max Technology Lab, Schneider Electric Lab, and Danfoss Center of Excellence at VIT University. He is presently finding new materials and technology for future nanoscale electronics and VLSI circuit engineering. He has been leading the Ranking and Accreditation team of Vellore Institute of Technology (VIT) as Director since 2015.