Verilog HDL

Informationen zum Autor Joseph Cavanagh Klappentext Offering a firm foundation in the design of digital systems using Verilog HDL! this book presents the Verilog language together with a wide variety of examples. It describes the different modeling constructs supported by Verilog with numerous examples designed in each chapter. Zusammenfassung Offering a firm foundation in the design of digital systems using Verilog HDL, this book presents the Verilog language together with a wide variety of examples. It describes the different modeling constructs supported by Verilog with numerous examples designed in each chapter. Inhaltsverzeichnis Introduction. Overview. Language Elements. Expressions. Gate-Level Modeling. User-Defined Primitives. Dataflow Modeling. Behavioral Modeling. Structural Modeling. Tasks and Functions. Additional Design Examples. Appendix A: Event Queue. Appendix B: Verilog Project Procedure. Appendix C: Answers to Selected Problems. Index.

Auteur
Joseph Cavanagh

Texte du rabat

Offering a firm foundation in the design of digital systems using Verilog HDL, this book presents the Verilog language together with a wide variety of examples. It describes the different modeling constructs supported by Verilog with numerous examples designed in each chapter.

Contenu
Introduction. Overview. Language Elements. Expressions. Gate-Level Modeling. User-Defined Primitives. Dataflow Modeling. Behavioral Modeling. Structural Modeling. Tasks and Functions. Additional Design Examples. Appendix A: Event Queue. Appendix B: Verilog Project Procedure. Appendix C: Answers to Selected Problems. Index.